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Designed Specifically to Drive Large and Small QG PFETs Very Low Loss Replacement for Power Supply OR'ing Diodes Wide Operating Voltage Range: 3.6V to 36V -40C to 125C Operating Temperature Range Reverse Battery Protection Automatic Switching Between DC Sources Low Quiescent Current: 35A per Channel Load Current Sharing MOSFET Gate Protection Clamp Precision Input Control Comparators for Setting Switchover Threshold Points Open-Drain Feedback Points for Customer Specified Hysteresis Control Minimal External Components Space Saving 10-Lead MSOP Package
The LTC (R)4416/LTC4416-1 control two sets of external P-channel MOSFETs to create two near ideal diode functions for power switchover circuits. This permits highly efficient OR'ing of multiple power sources for extended battery life and low self heating. When conducting, the voltage drop across the MOSFET is typically 25mV. For applications with a wall adapter or other auxiliary power source, the load is automatically disconnected from the battery when the auxiliary source is connected. The LTC4416 integrates two interconnected PowerPathTM controllers with soft switchover control. The "soft-off" switchover permits the users to transfer between two dissimilar voltages without excessive voltage undershoot (or VDROOP) in the output supply. The LTC4416/LTC4416-1 also contain a "fast-on" feature that dramatically increases gate drive current when the forward input voltage exceeds 25mV. The LTC4416 "fast off" feature is engaged when the sense voltage exceeds the input voltage by 25mV. The LTC4416-1 enables the fast off under the same conditions and when the other external P-channel device is selected using the enable pins. The wide operating supply range supports operation from one to eight Li-Ion cells in series. The low quiescent current (35A per channel) is independent of the load current. The gate driver includes an internal voltage clamp for MOSFET protection. The LTC4416/LTC4416-1 are available in low profile 10-lead MSOP packages.
APPLICATIO S

High Current PowerPath Switch Industrial and Automotive Applications Uninterruptible Power Supplies Logic Controlled Power Switch Battery Backup System Emergency Systems with Battery Backups
, LT, LTc and LTM are registered trademarks of Linear Technology corporation. PowerPath is a trademark of Linear Technology corporation. All other trademarks are the property of their respective owners.
Automatic PowerPath Switchover
V1 V1 = 12V (FAIL) V1 = 13.5V (RESTORE) PRIMARY SUPPLY 221k LTC4416 187k GND 24.9k E1 GND E2 H2 H1 V2 V2 = 10.8V BACKUP SUPPLY SUP75P03_07 V1 G1 VS G2 V2
4416 TA01
SUP75P03_07 cURRENT (A) 3.6 LTc4416
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TYPICAL APPLICATIO
LTC4416 vs Schottky Diode Forward Voltage Drop
8.0 cONSTANT RON
Under and Overvoltage Shutdown Operation
VIN 221k VTH2 WITH HYSTERESIS ScHOTTKY DIODE 24.9k GND VTH1 WITH HYSTERESIS 187k 24.3k 75k 182k LTC4416-1 H1 G1 E1 GND E2 H2 0.02 FORWARD VOLTAGE (V) 0.5
4416 TA01b
cONSTANT VOLTAGE
VS
0
UV ENABLED AT 5V, VIN RESTORED TO LOAD WHEN VIN RISES TO 5.5V OV ENABLED AT 13.5V, VIN RESTORED TO LOAD WHEN VIN FALLS TO 12V
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FEATURES
LTC4416/LTC4416-1 36V, Low Loss Dual PowerPath Controllers for Large PFETs DESCRIPTIO
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V1 VS V2 G2
VOUT TO LOAD
4416 TA01c
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LTC4416/LTC4416-1
(Note 1)
Supply Voltage (V1, V2) .............................. -14V to 40V Voltage from V1 or V2 to VS ....................... -40V to 40V Input Voltage E1, E2 .................................................... -0.3V to 40V VS ........................................................... -14V to 40V Output Voltage G1 ....... -0.3V to the Higher of V1 + 0.3V or VS + 0.3V G2 ....... -0.3V to the Higher of V2 + 0.3V or VS + 0.3V H1, H2 ..................................................... -0.3V to 7V Operating Ambient Temperature Range (Note 2) LTC4416E ............................................ -40C to 85C LTC4416I ........................................... -40C to 125C Operating Junction Temperature Range ................................ -40C to 125C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) .................. 300C
TOP VIEW H1 E1 GND E2 H2 1 2 3 4 5 10 9 8 7 6 G1 V1 VS V2 G2
MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 130C, JA = 120C/W
ORDER PART NUMBER LTC4416EMS LTC4416IMS LTC4416EMS-1 LTC4416IMS-1
MS PART MARKING* LTCFC LTCFC LTCPS LTCPS
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
ELECTRICAL CHARACTERISTICS
SYMBOL VV1, VV2, VVS IQFL IQFH IQRL IQRH IQCL IQCH ILEAK PARAMETER Operating Supply Range Quiescent Supply Current at Low Supply While in Forward Regulation Quiescent Supply Current at High Supply While in Forward Regulation Quiescent Supply Current at Low Supply While in Reverse Turn-Off Quiescent Supply Current at High Supply While in Reverse Turn-Off Quiescent Supply Current at Low Supply with E1 and E2 Active Quiescent Supply Current at High Supply with E1 and E2 Active V1, V2 and VS Pin Leakage Currents When Other Pin Supplies Power (Note 4)
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V1 = V2 = 12V, E1 = 2V, E2 = GND, GND = 0V. Current into a pin is positive and current out of a pin is negative. All voltages are referenced to GND, unless otherwise specified.
CONDITIONS V1, V2 and/or VS Must be in This Range for Proper Operation VV1 = 3.6V, VV2 = 3.6V. Measure Combined Current at V1, V2 and VS Pins Averaged with VVS = 3.560V and VVS = 3.6V (Note 3) VV1 = 36V, VV2 = 36V. Measure Combined Current at V1, V2 and VS Pins Averaged with VVS = 35.960V and VVS = 36V (Note 3) VV1 = 3.6V, VV2 = 3.6V. Measure Combined Current at V1, V2 and VS Pins with VVS = 3.7V VV1 = 35.9V, VV2 = 35.9V. Measure Combined Current at V1, V2 and VS Pins with VVS = 36V VV1 = 3.6V, VV2 = 3.6V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 Measured Separately VV1 = 36V, VV2 = 36V, VV1 - VVS = 0.9V, VE1 = 0V, VE2 = 2V, V1 and V2 Measured Separately VV1 = VV2 = 28V, VVS = 0V. Measure IVS VV1 = VV2 = 14V, VVS = -14V. Measure IVS VV1 = VV2 = 36V, VVS = 8V. Measure IVS PowerPath Controller VFR VRTO VFO PowerPath Switch Forward Regulation Voltage PowerPath Switch Reverse Turn-Off Threshold Voltage PowerPath Switch Forward Fast-On Voltage Comparator Threshold VV1, VV2 - VVS, 3.6V VV1, VV2 36V, CG1 = CG2 = 3nF VV1, VV2 - VVS, 3.6V VV1, VV2 36V, CG1 = CG2 = 3nF VV1, VV2 - VVS, 6V VV1, VV2 36V, CG1 = CG2 = 3nF, IG1, IG2 > 500A

MIN 3.6
TYP
MAX 36 70 130 70 130 30 65
UNITS V A A A A A A A A A mV mV mV
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-10 -10 -10 10 -40 50
-1 -1 -1
1 1 1 40 -10 125
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W
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WW
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ABSOLUTE
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
LTC4416/LTC4416-1 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER GATE Active Forward Regulation Source Current Sink Current Sink Current During Fast-On Source Current During Fast-Off G1 and G2 Clamp Voltage G1 and G2 Off Voltage G1 and G2 Turn-On Time G1 and G2 Turn-Off Time Enable Comparator Turn-Off Delay H1 and H2 Off Current H1 and H2 On Voltage H1 and H2 Turn-On Time H1 and H2 Turn-Off Time E1 and E2 Input Threshold Voltage E1 and E2 Input Leakage Current Source Current When Other Channel Enabled (Note 13) LTC4416 LTC4416-1 G1, G2 Controller IG(SRC) IG(SNK) IG(FO) IG(OFF) VG(ON) VG(OFF) tG(ON) tG(OFF) tE(OFF) IH(OFF) VH(ON) tH(ON) tH(OFF) VREF IE IG(ENOFF) (Note 5) (Note 6) (Note 7) (Note 12) Apply IG1 = IG2 = 2A, VV1 = VV2 = 12V, VVS = 11.8V, Measure VV1 - VG1 or VV2 - VG2 Apply IG1 = IG2 = -30A, VV1 = VV2 = 12V, VVS = 12.2V, Measure VV1 - VG1 or VV2 - VG2 VGS < -6V, CG = 17nF (Note 8) VGS > -1.5V, CG = 17nF (Note 9) (Note 14) LTC4416-1 Only 3.6V VV1, VV2 36V (Note 10) 3.6V VV1, VV2 36V (Note 10) (Note 11) (Note 11) 3.6V VV1, VV2 36V, -40C to 85C 4V VV1, VV2 36V, -40C to 125C 0V VE1, VE2 1.5V 1.180 1.180 -100 1.215 1.215 -9 15 500

The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V1 = V2 = 12V, E1 = 2V, E2 = GND, GND = 0V. Current into a pin is positive and current out of a pin is negative. All voltages are referenced to GND, unless otherwise specified.
CONDITIONS MIN TYP MAX UNITS
-2 200 8.25 0.350 -500 9.1 0.920 60 30 6
7.4
A A A A V V s s s A mV s s V V nA
H1 and H2 Open-Drain Drivers

-1
1 100 5 10 1.240 1.240 100
E1 and E2 Enable Input Comparators
-9 -500
-3
A A
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC4416E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC4416I is guaranteed and tested over the -40C to 125C operating temperature range. Note 3: This results in the same supply current as would be observed with an external P-channel MOSFET connected to the LTC4416 and operating in forward regulation. Note 4: Only 3 of 9 permutations illustrated. This specification is the same when power is provided through VS or V2. This specification is only valid when V1, V2 and VS are within 28V of each other. Note 5: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is set at 12V to measure the source current at either G1 or G2. Note 6: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is set at 11.96V to measure the sink current at either G1 or G2. Note 7: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is set at 11.875V to measure the sink current at either G1 or G2.
Note 8: V1 and V2 are held at 12V and VS is stepped from 12.2V to 11.8V to trigger the event. G1 and G2 voltages are initially VG(OFF). Note 9: V1 and V2 are held at 12V and VS is stepped from 11.8V to 12.2V to trigger the event. G1 and G2 voltages are initially VG(ON). Note 10: H1 and H2 are forced to 2V. E1 and E2 are forced to 1.5V to measure the off current of H1 and H2. H1 and H2 are forced with 1mA to measure the on voltage of H1 and H2. Note 11: H1 and H2 are forced to 2V. E1 and E2 are stepped from 1.3V to 1.1V to measure tS(ON). E1 and E2 are stepped from 1.1V to 1.3V to measure tS(OFF). Note 12: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is set to 12.05V to measure the source current at either G1 or G2. Note 13: V1 and V2 are held at 12V and G1 and G2 are forced to 9V. VS is set to 12V to measure the source current at either G1 or G2 when the channel is deselected. Note 14: V1 and V2 are held at 12V, VS = 11.96V and G1 and G2 have a 4k resistor each to 9V. Measure the delay after the channel is disabled until the gate signal begins to pull high.
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LTC4416/LTC4416-1 TYPICAL PERFOR A CE CHARACTERISTICS
VFR vs Temperature and Supply Voltage
40 -20
35 VRTO (mV) -40C VFR (mV) 30 125C 25 27C
27C -23 125C -24 -25
CURRENT (A)
20
0
5
10 15 20 25 30 SUPPLY VOLTAGE (V)
V1, V2 and VS Pin Leakage vs Temperature
-0.25 -0.50 CURRENT (A) 8.95 8.85 IV1: VV2, VVS - VV1 = 28V VGn(ON) (V) IV2: VV1, VVS - VV2 = 28V 8.75 8.65 8.55 8.45 8.35 0 100 TEMPERATURE (C) 50 150
4416 G04
VGn(OFF) (V)
-0.75 -1.00
IVS: VV1, VV2 - VVS = 28V -1.25
-1.50 -50
tG(ON) vs Temperature
100 CGn = 15nF VVS = VVIN - 200mV 10V VV1 VV2 36V tG(ON) (s) AT 10V 50 tG(ON) (s) AT 36V 25 tG(OFF) (s) 55 50 45 40 35 30 25 20 0 -50 0 100 TEMPERATURE (C) 50 150
4416 G07
75 tG(ON) (s)
UW
35 40
4416 G01
VRTO vs Temperature and Supply Voltage
1.20
Normalized Quiescent Supply Current vs Temperature
VV1 = VV2 = VVS = VVIN 3.6V VVIN 36V
-21 -40C -22
1.10
1.00
0.90
0
5
25 30 10 15 20 SUPPLY VOLTAGE (V)
35
40
0.80 -50 -25
NORMALIZED AT VIN = 3.6V VIN = 20V VIN = 36V 0 25 50 75 100 125 150 TEMPERATURE (C)
4416 G03
4416 G02
VGn(ON) vs Temperature and VIN
IGn = 2A VV1 = VV2 = VVIN VVS = VVIN - 200mV VIN = 10V VIN = 36V 0.50 0.40
VGn(OFF) vs Temperature and IGn
3.6V VV1 VV2 36V VVS = VVIN + 200mV IGn = -20A 0.30 IGn = -10A 0.20 IGn = 0A
0.10
8.25 -50
0
100 TEMPERATURE (C)
50
150
4416 G05
0 -50
0
50 100 TEMPERATURE (C)
150
4416 G06
tG(OFF) vs Temperature
tG(OFF) (s) AT 36V
tG(OFF) (s) AT 10V CGn = 15nF VVS = VVIN + 200mV 10V VV1 VV2 36V 0 50 100 TEMPERATURE (C) 150
4416 G08
15 -50
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LTC4416/LTC4416-1 PI FU CTIO S
H1 (Pin 1): Open-Drain Comparator Output of the E1 Pin. If E1 > VREF, the H1 pin will go high impedance, otherwise the pin will be grounded. The maximum voltage permitted on this pin is 7V. This pin provides support for setting up hysterisis to an external resistor network. E1 (Pin 2): LTC4416 Comparator Enable Input. A high signal greater than VREF will enable the V1 path. The ideal diode action will then determine if the V1 path should turn on by controlling any PFET(s) connected to the G1 pin. If the E1 signal is driven low, the V1 path will perform a "soft-off" provided the PFET(s) are properly configured for blocking DC current. An internal current sink will pull the E1 pin down when the E1 input exceeds 1.5V. E1 (Pin 2): LTC4416-1 Comparator Enable Input. A high signal greater than VREF will enable the V1 path. The ideal diode action will then determine if the V1 path should turn on by controlling any PFET(s) connected to the G1 pin. If the E1 signal is driven low, the V1 path will be quickly disabled by enabling the "fast-off" feature, pulling the G1 gate high. An internal current sink will pull the E1 pin down when the E1 input exceeds 1.5V. GND (Pin 3): Ground. This pin provides a power return path for all the internal circuits. E2 (Pin 4): LTC4416 Comparator Enable Input. A low signal less than VREF will enable the V2 path. The ideal diode action will then determine if the V2 path should turn on by controlling any PFET(s) connected to the G2 pin. If the E2 signal is driven high, the V2 path will perform a "soft-off" provided the PFET(s) are properly configured for blocking DC current. An internal current sink will pull the E2 pin down when the E2 input exceeds 1.5V. E2 (Pin 4): LTC4416-1 Comparator Enable Input. A low signal less than VREF will enable the V2 path. The ideal diode action will then determine if the V2 path should turn on by controlling any PFET(s) connected to the G2 pin. If the E2 signal is driven high, the V2 path will be quickly disabled by enabling the "fast-off" feature, pulling the G2 gate high. An internal current sink will pull the E2 pin down when the E2 input exceeds 1.5V. H2 (Pin 5): Open-Drain Comparator Output of the E2 Pin. If E2 > VREF, the H2 pin will go high impedance, otherwise
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the pin will be grounded. The maximum voltage permitted on this pin is 7V. This pin provides support for setting up hysterisis to an external resistor network. G2 (Pin 6): Second P-Channel MOSFET Power Switch Gate Drive Pin. This pin is directed by the second power controller to maintain a forward regulation voltage (VFR) of 25mV between the V2 and VS pins when V2 is greater than VS. When V2 is less than VS, the G2 pin will pull up to the VS pin voltage, turning off the second P-channel power switch. V2 (Pin 7): Second Input Supply Voltage. Supplies power to the second power controller and the band-gap reference. V2 is one of the two voltage sense inputs to the second internal power controller (the other input to the second internal power controller is the VS pin). This input is usually supplied power from the second, or backup, power source. This pin can be bypassed to ground with a capacitor in the range of 0.1F to 10F if needed to suppress load transients. VS (Pin 8): Power Sense Input Pin. Supplies power to the internal circuitry of both the first and second power controller and the band-gap reference. This pin is also a voltage sense input to both internal analog controllers (the other input to the first controller is the V1 pin and the other input to the second controller is the V2 pin.) This input may also be supplied power from an auxiliary source which also supplies current to the load. V1 (Pin 9): First Input Supply Voltage. Supplies power to the first power controller and the band-gap reference. V1 is one of the two voltage sense inputs to the first internal power controller (the other input to the first internal power controller is the VS pin). This input is usually supplied power from the first, or primary, power source. This pin can be bypassed to ground with a capacitor in the range of 0.1F to 10F if needed to suppress load transients. G1 (Pin 10): First P-Channel MOSFET Power Switch Gate Drive Pin. This pin is directed by the first power controller to maintain a forward regulation voltage (VFR) of 25mV between the V1 and VS pins when V1 is greater than VS. When V1 is less than VS, the G1 pin will pull up to the VS pin voltage, turning off the first P-channel power switch.
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LTC4416/LTC4416-1 W
RAIL1 9 V1 VS A1 FIRST ANALOG CONTROLLER EN1 2 E1 IG(SRC) EN2 IG(OFF) 8.5V G1 IG(SNK) IGFON(SNK) IG1 10
BLOCK DIAGRA
8
+
C1 VREF
H1 EN1
1
-
3 GND
RAILBG
BAND-GAP REFERENCE
VREF
RAIL2 7 V2 A2 SECOND ANALOG CONTROLLER EN2 4 E2 EN1 IG(SRC) IG(OFF) 8.5V G2 IG(SNK) IGFON(SNK) IG2 6
EN2
+
C2 VREF
H2
5
-
4416 BD
Operation can best be understood by referring to the Block Diagram which illustrates the internal circuit blocks. The LTC4416/LTC4416-1 are divided into three sections, namely: 1. The channel 1 controller consisting of A1, C1, the "first analog contoller," the G1 drivers and the H1 output driver. 2. The band-gap reference 3. The channel 2 controller consisting of A2, C2, the "second analog controller," the G2 drivers and the H2 output driver.
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Each of the three sections has its own derived internal power supply referred to as a rail. RAIL1 provides power to the channel 1 controller. RAIL2 provides power to the channel 2 controller. The internal RAILBG provides power to the band-gap reference. The internal rail1 derives its power from the higher voltage of V1 and VS. The internal rail2 derives its power from the higher voltage of V2 and VS. RAILBG derives its power from the highest voltage of V1, V2, and VS. All three sections share a common ground connected to the GND pin.
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OPERATIO
LTC4416/LTC4416-1
The band-gap reference provides internal bias currents used by the channel 1 and channel 2 controllers. It also provides a precision voltage reference, VREF, used by comparators C1 and C2. The band-gap reference is powered as long as a minimum operational voltage is present on either V1, V2, or VS. The C1 and C2 comparators provide a fixed comparison between the E1 and E2 inputs, respectively, and the internal VREF signal. The comparator outputs are directly represented by the H1 and H2 open-drain outputs. The output states of H1 and H2 are not dependent upon the relative voltage difference between VV1 - VVS and VV2 - VVS, respectively. If VE1 is less than VREF, the H1 open-drain output will be low impedance to GND. If VE2 is less than VREF, the H2 open-drain output will be low impedance to GND. The A1 and A2 circuits act both as a high side transconductance amplifiers and as comparators. Both A1 and A2 act identically when the analog controllers are fully enabled. The relationship of the G1 current is represented by Figure 1. When VV1 - VVS < VRTO, the A1 activates the reverse turnoff condition and the IG1 current is IG(OFF). When VRTO < VV1 - VVS < VFR, the A1 acts as a class A output and the IG1 current is fixed at IG(SRC). As the VV1 - VVS voltage
IG1 IGFON(SNK)
VRTO IG(SRC) VFR VFON VV1 - VVS
IG(OFF)
Figure 1. IG1 vs VV1 - VVS
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approaches the forward regulation voltage, VFR, the IG(SNK) current will be proportional to VV1 - VVS. When VV1 - VVS > VFON, the A1 activates the fast-on condition, tG(ON), and the IG1 current is set to IGFON(SNK). LTC4416 OPERATION The interaction of the LTC4416 analog controllers distinguish the operation of the LTC4416 from a simple circuit using two PowerPath controllers. Table 1 explains the different operation modes of the analog controllers.
Table 1. LTC4416 Operational Modes
E1 1 1 Sense 0 X 0 E2 0 0 X 1 1 Operation Mode Load Sharing V1 is Greater Than V2 Channel 1 Disabled. Do Not Use Channel 2 Disabled. Do Not Use Both Channels Disabled Disabled Disabled Disabled Disabled IG(OFF)1 Enabled Enabled Enabled IG(OFF)2 Enabled Sense V1 is Less Than V2
OPERATIO
The LTC4416 has six modes of operation. Each mode of operation is dependent upon the configuration of the E1 and E2 input pins. Load Sharing Operation The load sharing mode configures the LTC4416 into two independent PowerPath controllers. This is accomplished by fully enabling both the first analog controller and the second analog controller. Both channels will implement the gate drive outlined in Figure 1. V1 is Less Than V2 Operation Channel 1 is fully enabled. If VV1 - VVS < VRTO, channel 1 will implement all of the IG1 currents listed in Figure 1. When VE2 is above the VREF threshold, channel 2 is in a "soft-off mode". This means that G2 will only provide an IG(SRC) current instead of either an IG(SRC) or an IG(OFF) current.
IG(SNK)
NOT DRAWN TO SCALE
4416 F01
When VE2 is below the VREF threshold, channel 2 is fully enabled, and G2 will become active implementing the IG output current listed in Figure 1.
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LTC4416/LTC4416-1
V1 is Greater Than V2 Operation When VE1 is below the VREF threshold, channel 1 is in a "soft-off mode". This means that G1 will only provide an IG(SRC) current instead of an IG(SNK) or an IGFON(SNK) current. When VE1 is above the VREF threshold, channel 1 is immediately fully enabled, and G1 will become active implementing the output current listed in Figure 1. Channel 2 is fully enabled. If VV1 - VVS < VRTO, channel 2 will implement all of the IG2 currents listed in Figure 1. Channel 1 is Disabled The LTC4416 is not designed to have channel 1 disabled by grounding E1 and leaving E2 in an indeterminate state. If this happens, the channel 2 PowerPath controller will not have reverse turn-off capability. No electrical harm to the LTC4416 will occur. Channel 2 is Disabled The LTC4416 is not designed to have channel 2 disabled by connecting E2 high and leaving E1 in an indeterminate state. If this happens, the channel 1 PowerPath controller will not have reverse turn-off capability. No electrical harm to the LTC4416 will occur.
LTC4416 The LTC4416 is designed to support three major applications. The first two applications assume that V1 is the primary power source and V2 is the backup power source. The first application is where the V1 power supply is normally less than V2. The second application is where the V1 power supply is normally greater than V2. The third application addresses the load sharing case where both V1 and V2 are relatively equal in value. V1 is Less Than V2 Figure 2 illustrates the external resistor configuration for this case.
V1
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APPLICATIO S I FOR ATIO W U U
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Both Channels Disabled When both channels of the LTC4416 are disabled, both G1 and G2 currents are set to IG(SRC). LTC4416-1 OPERATION The LTC4416-1 is designed for overvoltage/undervoltage protection or when either voltage path must be turned off rapidly, regardless of the status of the other voltage input. The LTC4416-1 does not implement the soft-off feature implemented in the LTC4416. The E1 and E2 inactive will force the IG current of their respective channel to IG(OFF). Table 2 explains the operation of the E1 and E2 inputs. The term "active" implies that IG(OFF) current is forced on the Gn pins regardless of the VVn - VVS value. The term "enabled" implies that IG(OFF) current is provide on the Gn pins if and only if VVn - VVS < VRTO.
Table.2 LTC4416-1 Operational Modes
E1 0 X 1 X E2 X 1 X 0 Operation Mode Undervoltage Protection Overvoltage Protection Channel 1 PowerPath Channel 2 PowerPath Enabled Enabled IG(OFF)1 Active Active IG(OFF)2
V1 = 9V (FAIL) V1 = 10.8V (RESTORE) R2A 158k LTC4416 R2E 105k GND R2C 24.9k E1 H1 GND E2 H2 V2 V2 = 14.4V BACKUP SUPPLY V1 G1 VS G2 V2
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OPERATIO
PRIMARY SUPPLY
Q1 SUP75P03_07
VS
Q2 Q3 SUP75P03_07
Figure 2
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LTC4416/LTC4416-1
This configuration would be used where V1 is a 12V power supply and the V2 power supply is a 4-cell Li-Ion battery pack. When V1 is 12V, E2 disables the V2 source from being connected to VS through Q2A and Q2B by forcing G2 to V2, H2 is open circuit. E1 is connected to a voltage greater than the VREF to keep the V1 to VS path active. The VS output can be shut completely off by grounding the E1 input. The LTC4416 takes its power from the higher of V1, V2 and VS. This configuration will provide power from V1 to VS until the V1 supply drops below 9V. When V1 drops below 9V, the H2 pin closes to GND, G2 drops to a VCLAMP below V2 and G1 rises to the VS voltage level. V2 will supply current to VS until V1 rises above 10.8V. The H1 output will be open until the E1 input drops below the VREF voltage level. The V1 VFAIL is determined by: VFAIL = VETH * R2A + R2c R2c 158k + 24.9k = 8.98 V 24.9k k
= 1.222V *
The V1 VRESTORE is determined by: VRESTORE = VETH
(R2A + (R2c R2E)) *
R2c R2E 158k + 24.9k 105k 5 24.9k 105k
= 1.222V * V1 is Greater Than V2
(
) = 10.81V
Figure 3 illustrates the external resistor configuration for this case. This configuration would be used where V1 is a 12V power supply and the V2 power supply is a 3-cell Li-Ion battery pack. When V1 is 16V, E1 enables the V1 source as being the primary supply, thus disabling the V2 supply since V1 > V2. When E1 > VREF, the H1 output is open. The VS output can be shut completely off by grounding the H1 input and forcing E2 > VREF. The LTC4416 takes its power from the higher of V1, V2 and VS. This configuration will provide power from V1 to VS until the V1 supply drops below 12V.
U
V1 V1 = 12V (FAIL) V1 = 13.5V (RESTORE) R1A 221k R1D 187k GND R1C 24.9k LTC4416 E1 GND E2 H2 H1 V2 V2 = 10.8V BACKUP SUPPLY Q3 SUP75P03_07 V1 G1 VS G2 V2
4416 F03
APPLICATIO S I FOR ATIO W U U
PRIMARY SUPPLY
SUP75P03_07 Q1 Q2
VS
Figure 3
When V1 drops below 12V, the H1 pin closes to GND, G2 drops to a VCLAMP below V2 and G1 rises to the V1 voltage level. V2 will supply current to VS until V1 rises above 13.5V. The H2 output will be shorted to GND until the E2 input goes above the VREF voltage level. The V1 VFAIL is determined by: VFAIL = VETH * R1A + R1c R1c 221k + 24.9k = 12.07 V 24.9k k
= 1.222V *
The V1 VRESTORE is determined by: VRESTORE = VETH *
(R1A + (R1c R1D))
R1c R1D 221k + 24.9k 187k 2 24.9k 187k
= 1.222V * Load Sharing
(
) = 13.51V
Figure 4 illustrates the configuration for this case. This configuration would be used where V1 and V2 are relatively the same voltage. In this case the LTC4416 acts as two interconnected ideal diode controllers. VS will be supplied by the higher of the two supplies, V1 and V2. If V1 and V2 are exactly the same, then 50% of the current for VS will be supplied by each supply. As the two supplies
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LTC4416/LTC4416-1
differ by more than 100mV, 100% of the load will come from the higher of V1 or V2. The user has the option of using E1 and E2 to disable one of the two supplies by connecting them to a digital controller. If E1 is brought low, V1 will no longer supply current to VS. If E2 is brought high, V2 will no longer supply current to VS. If E1 is brought low and E2 is brought high, VS will be disabled. Figure 5 shows the same application without the shutdown option. It has one-half the losses of Figure 4 and is configured for 5V rails.
V1 V1 = 12V Si7483ADP Q1 Q2
LTC4416 E1 TO HOST CONTROLLER E2 E1 H1 GND GND E2 H2 V2 V2 = 12V V1 G1 VS G2 V2
4416 F04
Q3 Q4 Si7483ADP
Figure 4
SUPPLY 1 Q1 Si7495DP
V1 5V
LTC4416 H1 E1 GND E2 H2 V2 5V V1 G1 VS G2 V2
4416 F05
SUPPLY 2
Q2 Si7495DP
Figure 5. Dual PowerPath for Current Sharing
LTC4416-1 The LTC4416-1 will support all three of the LTC4416 applications without the "soft-off" feature. The only difference in the two designs is the LTC4416-1 will rapidly switch off the load from a supply whenever a channel is
0
U
disabled. This rapid turn-off feature is desirable when the supply cannot tolerate certain voltage excursions under load, or when the load is being protected from a rapidly changing input supply. Under and Overvoltage Shutdown Refer to Figure 6 for an application circuit which disables the power to the load when the input voltage gets too low or too high. When VIN starts from zero volts, the load to the output is disabled until VIN reaches 5.5V. The V1 path is enabled and the load remains on the input until the supply exceeds 13.5V. At that voltage, the V2 path is disabled. As the input falls, the voltage source will be reconnected to the load when the input drops to 12V and the V2 path is enabled. Finally, the load will be removed from the input supply when the voltage drops below 5V.
VIN R2A 221k VTH1 WITH HYSTERESIS R2E R1C 187k 24.3k R1A 75k R1D 182k LTC4416-1 H1 G1 E1 GND E2 H2 V1 VS V2 G2
4416 F06
APPLICATIO S I FOR ATIO W U U
VS
VTH2 WITH HYSTERESIS R2C 24.9k GND
VOUT TO LOAD
UV ENABLED AT 5V, VIN RESTORED TO LOAD WHEN VIN RISES TO 5.5V OV ENABLED AT 13.5V, VIN RESTORED TO LOAD WHEN VIN FALLS TO 12V
Figure 6
VS 5V
Undervoltage VFAIL = VETH * R1A + R1c R1c 75k + 24.3k = 4.99 V 24.3k
= 1.222V *
VRESTORE = VETH *
(R1A + (R1c R1D))
R1c R1D 24.3k 182k
= 1.222V *
75k + 24.3k 182k 5
(
) = 5.497V
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LTC4416/LTC4416-1
Overvoltage VFAIL = VETH * R2A + R2c|| R2E R2c|| R2E 221k + 24.9k || 187k = 13.51V 24.9k || 187k R2A + R2c R2c
= 1.222V *
VRESTORE = VETH *
VOLTAGE (V)
221k + 24.9k = 1.222V * = 12.07 V 24.9k 4 The over and undervoltage lockout circuits are shown here working in tandem. It is possible to configure the circuit for either over or undervoltage lockout by using only one of the voltage paths and eliminating the components from the other. Refer to Figure 7 for an LTC4416-1 configured for overvotlage protection. If the input does not go below ground, transistor Q1 can be eliminated. The LTC4416-1 should be used in this configuration rather than the LTC4416 because the LTC4416-1 will turn-off rapidly if an over or undervoltage condition is detected. Refer to Figure 8 for a comparison of the transient response of the two ICs using the circuit configuration of Figure 6. The LTC4416 will not turn-off quickly in an overvoltage or undervoltage condition because the "fast-off" feature is not enabled. This will cause the output to travel beyond the desired range.
VIN Q1 R2A 221k R1A 100k LTC4416-1 H1 G1 R2E 187k E1 GND E2 H2 V1 VS V2 G2
4416 F07
Q2
VOLTAGE (V)
VTH2 WITH HYSTERESIS R2C 24.9k GND
Figure 7. LTC4416-1 Configured for Overvoltage Protection
Information furnished by Linear Technology corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Figure 9 contains a rapidly changing input voltage on a much smaller time scale in comparison to Figure 8. The LTC4416 will require the tE(OFF) time prior to the rapid pullup current being applied. The gate voltage will be pulled high with IG(OFF) which has a minimum current of 500A. The discharge time of the gate will be dependent on the capacitance of the external FET and the initial gate-source voltage of the circuit. The total time delay will equal: tDELAY = tE(OFF ) + tDIScHARGE = tE(OFF ) +
20 VOUT LTC4416 15 VOUT LTC4416-1
APPLICATIO S I FOR ATIO W U U
cGS * V IG(OFF)
10
VOUT LTC4416-1 VOUT LTC4416
5
VIN
0 0 20 40 TIME (ms) 60 80
4416 F08
Figure 8. Transient Response of the LTC4416 vs the LTC4416-1 Light Load with a Large Capacitor on VOUT
13.60 13.55 13.50 13.45 13.40 0 0 5 10 15 20 25 TIME (s) 30 35 40
4416 F09
VIN LTC4416
LTC4416-1 GATE DISCHARGE TIME V =C I G(OFF)
VOUT TO LOAD
tE(OFF)
Figure 9. Close Up of the Transient Response of the LTC4416-1 to a Rapidly Rising Input
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LTC4416/LTC4416-1 U
(Reference LTc DWG # 05-08-1661)
0.889 0.127 (.035 .005)
GAUGE PLANE
PACKAGE DESCRIPTIO
MS Package 10-Lead Plastic MSOP
0.254 (.010)
DETAIL "A"
0 - 6 TYP
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
DETAIL "A"
0.53 0.152 (.021 .006) 0.18 (.007) SEATING PLANE
1.10 (.043) MAX
0.86 (.034) REF
3.00 0.102 (.118 .004) (NOTE 3)
10 9 8 7 6
0.497 0.076 (.0196 .003) REF
0.50 0.305 0.038 (.0197) (.0120 .0015) BSc TYP REcOMMENDED SOLDER PAD LAYOUT
NOTE: 1. DIMENSIONS IN MILLIMETER/(INcH) 2. DRAWING NOT TO ScALE 3. DIMENSION DOES NOT INcLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXcEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INcLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXcEED 0.152mm (.006") PER SIDE 5. LEAD cOPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.17 - 0.27 (.007 - .011) TYP
0.50 (.0197) BSc
0.127 0.076 (.005 .003)
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
MSOP (MS) 0603
12345
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ThinSOT is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 Mccarthy Blvd., Milpitas, cA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 0507 REV A * PRINTED IN USA
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2005

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